Hello Richard, Will interrupt nesting be supported soon for all ports? For the stack challenged like the 8051 it may not make much sense – but as a diagnostic tool it could be very helpful even on the 8051. Thanks, John W.
Hi, As far as I know about it, Interrupt Nesting has to be supported by the processor. Which means, if a given processor does not support Interrupt Nesting, than it is not possible to add it to its Port. If any other given processor supports it, you have to give the tick-timer-isr and the portYIELD (if realized as SWI) a priority number while installing them. Regards, Olibats
Richard, It’d be great if we could get a comment from you on this. Thanks, John
My preference is not to nest interrupts because of the analysis complexity it incurs (how much stack do you need, for example?) and the additional overhead it requires on each interrupt. Thus I only implement it when absolutely required. The M3 port permits nested interrupts because it is easier to support them than not and the processor design is such that it does not generate an overhead. The use of the configKERNEL_INTERRUPT_PRIORITY option will get rolled out to the other ports in time. This is not implement a complete nesting scheme as interrupts that use the FreeRTOS.org API run at the same priority – it just provides an easy way of implementing very high priority or time critical interrupts without the kernel interfering. Full interrupt nesting is rarely actually required when using a kernel as per http://www.freertos.org/FAQISR.html#Nest (which I know you are familiar with already, I just link it here for other readers). Regards.
Richard, Thanks for the response, John
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