Hello Richard, I have some comments to make about the use of interrupt priorities in the pic18 for the tick correctness. You say, in your faq, that in an interrupt occur just before the tick interrupt, there will be a glitch, but all will be good next time because the choosen timer is continuous. It’s right if we don’t "loose" any tick. But the fact is that if first interrupt takes more time than 1/portTICK_RATE_HZ, a tick can be missed and all time based functions can be false. My questions are the following : - is it possible to implement the tick as a high priority interrupts, that would just call     vTaskIncrementTick() if a low priority interrupt is running ? - are other port implement tick the same way ( and same limitation ) ? Thanks in advance four your attention and work. fabien

The PIC18 does allow two priorities of interrupt.  The demo is set up to use compatibility mode – so this feature of the PIC is effectively disabled. Calling vTaskIncrementTick() while a lower priority interrupt is running by itself would not be dangerous because this does not cause a context switch.  Calling vTaskSwitchContext() on the other hand could be more troublesome and requires a change to the interrupt entry/exit routines to guarantee that it would work. The demo applications are always intended to be as simple to understand and use as possible.  This means that as downloaded they do not support interrupt nesting (the drivers only re-enable interrupts at the end of the ISR).  To allow nesting you have to keep a count of the number of interrupts that are currently in service – then only restore the context when the interrupt stack has unwound completely.  This is very similar to the portENTER_CRITICAL() and portEXIT_CRITICAL() functions for the ARM port if you want to see an example (these just keep a count of the nesting level, then only reenable interrupts when it has unwound).  Basically you just have to check that no interrupts are in process before portRESTORE_CONTEXT is called otherwise the interrupt stack will get messed up. Supporting interrupt nesting also requires that the task context is always saved in it’s entirety on entry to an ISR, and restored in it’s entirety on exit.  This is a big overhead if it is not required – and adds complexity to the application writer. This obviously has stack implications on RAM limited devices such as the PIC (the higher priority interrupt may even have a different stack?  Can’t remember). Using an RTOS means most interrupts can be kept very short.  Normally the interrupt service routine would do nothing but grab some input and post it on a queue (see the I2C driver on the first TCP/IP demo).  The input would then in fact be processed at task level by a task woken by the data being posted.  Keeping interrupt short in this manner means that nesting is nearly always not required.  However each application is different and has different processing loads so has to be assessed by itself.

In my idea, tick loss could be correct without many modifications by doing the following : - run a first timer (let’s call it timer3) with high priority interrupt that only call vTaskIncrementTick3() - run a 2nd timer (let’s call it timer1) that is low priority and witch call vTaskSwitchContext(). Of course, on entering this interrupt, first task would be to update Tick with it’s tick with Tick3. I think of timer1 and timer3 on pic18. By this, even if tick interruption are missed, the tick is not false. finally, as far as timer3 interrupt treatment is very "light", there’s no problem letting it run. If my point of view is not correct, thank you for correct me. fabien